FSM Design & Implementation using PLDs & Verilog

Background:

There are many ways to implement a finite state machine (FSM). Either through pure software that runs on an embedded device or a mix of manual combinational circuit design or by using a hardware description language that will do the combinational circuit design for you. In this application, I will be using a mixture of methods to implement a finite state machine.

A Moore type FSM has three main components, the combinational input circuit, the flip flops, and the output combinational circuit. As a whole, it is a sequential circuit since it depends on the previous state and on a clock signal, but it's nothing more than two combinational circuits connected by the sequential component aka the flip-flop.

Approach and Reasoning:

I will be using Verilog to program two programmable logic devices(PLDs) for the combinational circuit parts and I will also be using discrete flip-flops to bridge them together and complete the FSM. The clock signal will be used from a function generator. Since this task requires combinational circuit design, I will be extracting the logic equations for the combinational circuits to make it fun.

Design Overview

I will design a Moore type sequential circuit that simulates the control of an automatic car wash. This car wash has two cycles: a normal and a deluxe cycle. The deluxe cycle is activated if the DELUXE input is HIGH when the FSM it is at the RINSE #2 state. Below are all the Output states as well as the inputs.

Output states:

1. Inactive
2. Rinse #1
3. Soap Spray
4. Scrub
5. Rinse #2
6. Wax
7. Rinse #3

8. Dry

Each state will be represented by an LED.

Inputs:

1. START.
2. DELUXE

3. KILL

Behavior

The system will remain in the inactive state until the START input is set to high. Once START is set to high, it will cycle through the first five stages even if the START input is set back to low.

At the fifth stage, Rinse #2, the user will have a choice to continue in the deluxe cycle by setting the DELUXE input to high. If the DELUXE input is set to HIGH at this stage, then it will continue the cycle all the way through the eighth state even if the START input is set to low.

If the KILL input is set to high at any time, it will go back to Inactive on the next state regardless of the other inputs.

FSM Specifications

Three inputs: S, D, K representing Start, Deluxe, Kill respectively

Eight outputs: LED1-LED8

Desired Sequence:

If SDK = 100 LED1, LED2, LED3, LED4, LED5, LED1, ...

If SDK = 110(at Rinse #2) LED1, LED2, LED3, LED4, LED5, LED6, LED7, LED8, LED1...

If SDK = XX1 LED1, LED1, ...

If SDK = 000 at Inactive LED1, LED1, ...

if SDK = 000 at any other state Next state

State Diagram

Before starting on the design, it is important to create a state diagram to keep track of all the states and transitions. I created the state diagram below.

State Table

After verifying each transition from the state diagram, it's now time to put them into a state table format. I made the following table in excel to organize everything into a more readable format.

Flip-flops needed

It is not important to determined how many components will be needed. To do so, I have to first determine the number of states and get the least amount of flip-flops that could represent that many states.

In this application there are a total of 8 states, so I just need to use the following formula and solve for N.

Here I determined that I only need 3 flip-flops.

I chose to use D flip-flops to facilitate the excitation table assignment. I named the flip-flops D3,D2,D1.

State Assignment Table

Using the State Table, I converted the names of the states into a binary value that represents it. I used the following conversions:

Inactive →
000

Rinse #1 → 001

Soap Spray → 010

Scrub → 011

Rinse #2 → 100

Wax → 101

Rinse #3 → 110

Dry → 111

Which transformed the table to the following state assignment table:

Output Logic

Now using the state assignment table the output logic equations can be derived. For the output logic, only the Current State and Outputs columns are needed so I will trim it down to make it easier on the eyes.

To derive the logic for each LED, the current state represented by q3q2q1 are used as fields and the value of LEDn for that combination is filled in.

The k-map for each LED and its extracted equation is shown below:

Building Input Table

In the input table, the next state values are to be replaced by the type of flip-flop's excitation table. I chose D flip-flops since they have the most straightforward excitation table. The excitation table for a D flip-flop is shown below:

The next state Q(t+1) just follows the input D. That means there is no change to the state assignment table, but I will still trim the table again to only show the Current State and next state as well as modifying Q3Q2Q1 to D3D2D1 to indicate I applied the excitation table on each flip-flop.

Input Logic

Now the input logic equations can be extracted for each flip-flop using the excitation table.

Using a 6 variable K-map I extracted the SOP form of each. To aid readability I color coded each group a different color and put more than 1 K-map diagram to show the overlapping groups.