A brief background
Switched mode power supplies are very useful in modern electronics due to their high efficiency and are a better alternative for mobile devices than linear voltage regulators. There's already a wide range of commercial products available for the typical 5V, 3.3V and 6V applications, but the fun part is also in the design of one. Today I will be documenting the design and simulation of the power stage in a step down switched mode power supply, also known as a buck converter.
Specifications
This buck convert will step down 15V DC to 7V DC with an expected ripple of 200mV. It will also be able output 250mA to the load and have a current swing of 30%. The switching speed will be set to 100kHz .
Here are the specs in a bulleted list to make it easier to see:
- fₛ = 100kHz
- Vin = 15V
- Vout = 7V
- Iout = 250mA
- ΔiL = 30%
- ΔVout = 200mV
Setup
Before proceeding with the calculations, this is the typical schematic of a buck converter's power stage. We have an input DC voltage and a filter capacitor. On the other end we have a resistor simulating a load. The switching is done by a PMOS MOSFET since the input voltage to the gate is typically smaller. A Schottky diode is used as it provides a very low voltage drop compared to other types of diodes.
Basically we make one approximation which is that the output voltage is linearly related to the switching frequency duty cycle as denoted by EQ 1a.
EQ. 1a
Calculations
That approximation is very useful as it allows us to calculate the duty cycle needed. Here I will use D to indicate the ratio of the duty cycle. When speaking about duty cycle, one usually uses percentage rather than a ratio so to clear confusion, a decimal value for D is assigned.
The duty cycle ratio D can be calculated by using EQ. 1a. Next, we can just expand it to get EQ. 1b as seen below:
EQ. 1b
Once expanded, we can substitute the known values in. When designing a simple buck converter we always know the expected input voltage range and of course our intended output voltage. Here Vin = 15V and Vout = 7V.
The other unknown parameter is the voltage drop of the diode. In a switched mode power supply it is deal to minimize the voltage drop as it will allow use a smaller voltage to drive the gate of the transistor and reduce losses. Schottky typically have lower voltage drops than other types of diodes which is why they're used this application.
I chose to use the 80SQ045N Schottky Diode which according to the datasheet it has a maximum forward voltage drop Vd = 0.55V. As an engineer, it is good practice to design for the worst-case scenarios just to be extra safe.
Determining value of D:
Now we can plug in our known values into EQ. 1b to solve for D.
Inductance:
Next, we need to solve for an inductor value that would allow us to determine the base output voltage. This is done by the following equation EQ. 2:
EQ. 2 Before plugging and solving for L, we need to do a bit more math to determine Ton from the switching frequency fₛ = 100kHz. Ton is just the period of the time that the MOSFET will be on. In other words it's just D*T where T is the period that corresponds with our switching frequency of 100kHz.
Now we can just plug in the values in
EQ. 2 to solve for L:
Output Capacitance:
Now it's time to calculate the output capacitance to obtain the intended voltage ripple of 200mV.
We will use EQ. 3 below:
EQ. 3
We already know the Vripple = 200mV, ΔiL = 30% and T = 1/fₛ where fₛ=100kHz, so we simply plug them in.
Input Capacitance:Just like the output capacitance, we must also calculate the input capacitance. The equation used for this is EQ 4. below.
EQ. 4
Again, we know all of these values from our intended specifications so we simply plug in.
Determining MOSFET Gate Driver VoltageFinally, it's time to choose the voltage levels needed to turn our PMOS transistor ON and OFF. This means we'll be operating in the triode region exclusively.
According to the datasheet, the gate-source threshold voltage ranges from -2.0V to -4.0V.
By testing my model on PSPICE with the circuit setup, I found that the threshold voltage Vt = -3.571V. For the PMOS to be ON and OFF, the following conditions must be met:
From the schematic, the source terminal will be directly plugged in to our input source voltage. That means Vs = 15V. Vg will simply be equal to our input square wave that is being used as our driving voltage, therefore Vg= Vin = Vsquare. By using the conditions and plugging in these values we can get the minimum value for Vg.
Since 12V is a very common voltage, our gate voltage to drive it will be 0V for OFF state and 12V for ON.
Now that we have all values needed, we can simulate it.
Simulation
We can now fill in the values for the components and get the circuit below:
Using a 100Ohm resistor to simulate a load and placing a probe at the output we run a transient simulation to show the output.
Output Waveform
First we set the ending time to be 4.0ms to ensure that it stabilized. As seen below, the voltage stabilizes at around 7V, but we can zoom in further if it's not very visible.
Next, we can inspect the waveform by zooming in at a stable point and observe the voltage ripple. The waveform zoomed in at around 1.6ms-1.7ms is shown below with some markers to indicate the peaks of the voltage ripple:
As seen, the lowest value is 6.9995V and the highest is 7.1947V which are very close to the intended values of 7.0V and 7.200V to have a 200mV ripple. This means we are well within the ripple specification.
Duty Cycle vs Vout
To demonstrate that the duty cycle is linearly related to the output voltage, I logged various center output voltages as I varied the duty cycle and plotted the results.
The plot shows a very linear behavior which confirms that the approximation made for the derivation of the equation holds true.
Conclusion: While the simulation gave the intended results as calculated there are still some things to consider. First, it's important to choose an inductor with low ESR to improve efficiency. Not all components are made the same, so this is an important parameter when checking datasheets. Next, it is also important to ensure that the MOSFET chosen can handle the maximum current. Here a power MOSFET was used but not necessary as a lot of transistors can handle a current that low without a heatsink. In most applications we want to output at least 1A so I decided to stick with it.
This was my first time designing a buck converter and it was a fun process. I am aware that the capacitor and inductor values need to be rounded to the nearest standard value, however I did not have lab access when I was designing and simulating this.
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